User2User | October 25, 2012 | Munich, Germany - Presentations available!

Thank you for attending U2U 2012 on October 25th at the at the Hilton Munich Park.  This was the first year offering our complimentary, one-day user group meeting and it was successful.    Presentations are now hosted on the SupportNet site.  Simply click on the link below and login to SupportNet.  If you are a new user please register here.  Once registered, use the link below.

2012 Munich Presentations

Presentations available on SupportNet are listed below:
Some authors have elected not to publish their presentations due to confidential information.  Those presentations are identified by a (NOT AVAILABLE) following their presentation title & abstract.

KEYNOTE:
Organizing by Design - Wes Ryder, Mentor Graphics - NOT AVAILABLE
Development in a Leading Market - Matthias Voigt, Renesas Electronics Europe 
   
IC (Calibre) Track   
What you need to know to Design at 20nm! – Calibre Roadmap Update - David Abercrombie, Mentor Graphics 
A Novel Approach to Dummy Fill for Analog Designs Using Calibre SmartFill - Colin Thomas, Cambridge Silicon Radio 
Fully Integrated Litho Aware PnR Design Solution - Fabrice Bernard-Granger, STMicroelectronics
Automated Flow for Voltage Dependent Layout Checks - Radu Stoica, Infineon Presentation
Calibre Auto Waiver in TowerJazz DRC Flow - Amir Oren, TowerJazz - NOT AVAILABLE   
IC Design Track   
IC Design Update - Luc Tissot, Mentor Graphics 
Scan Test Compression Access for Diagnosis in Application - Paul-Henri Pugliesi-Conti, NXP Semiconductor 
Effects of Various EDT Channels Allocations on Test Cost and Quality on a 40nm Testcase - Arik Krantz, Broadcom 
Implementing a 256 Processor Array Core Using Olympus-SoC - Francois Jacquet,  Kalray - NOT AVAILABLE
TBD - Sub Johal,  Sondrel NOT AVAILABLE
   
PCB Design Track (German Language)   
Expedition PCB & HyperLynx – ZWEI Design Flows integriert in EINEM Entwicklungsprozess - Liviu-Dumitru Craciun, Harman - NOT AVAILABLE
Der DRC - ein oft unterschätztes Prüfmodul im PCB-Designprozess - Detlef Lehmann, GCD Print Layout 
Trivialität Leiterplatte - Träume werden wahr - Dieter Wachter, Diehl BGT Defence 
Präsentation der Mentor Graphics Usergroup - Hanno Platz, GED - NOT AVAILABLE
   
PCB Design Track (English Language)   
Integrated Systems Design for Industries in Transition - Joe Krolla, Mentor Graphics - NOT AVAILABLE
Building a Competitive Edge through Performance Excellence - Guy Brill, Consultant 
TBD - John Hill EADS, Astrium - NOT AVAILABLE
On the Way to Hierarchical Design - Andreas Schäfer, Fujitsu Technology Solutions 
TBD - Manfred Sammet, CADCAM Group Presentation 
   
Functional Verification Track   
Transforming Verification:  Revenge of the Respin - Alain Gonier, Mentor Graphics 
Digital to Mixed-Signal Verification of Power Managmenet SOCs Using Questa-ADMS - Mathieu Behaghel, STMicroelectronics
Functional Safety Features in ARM Cortex-R Processors - Christopher Turner, ARM - NOT AVAILABLE
OVM Adoption:  Is it Worth it?  Flashback on 4 Years of OVM Adoption - Markus Goertz,  STMicroelectronics 
Formal Verification of an Interrupt Controller - Othmane Bahlous, Infineon