The Big Squeezewrhines_hirez
Walden C. Rhines | CEO & Chairman | Mentor Graphics
There are lots of alternatives, including a reduction in profitability of the members of the supply chain, to keep the progress continuing at the same rate as the last fifty years. Dr. Rhines will review the mathematical basis for the dilemma and, with his brand of humor, provide a roadmap of possibilities for the decade ahead.

Biography
WALDEN C. RHINES is Chairman and Chief Executive Officer of Mentor Graphics, a leader in worldwide electronic design automation with revenue of $1.1 billion in 2011. During his tenure at Mentor Graphics, revenue has nearly tripled and Mentor has grown the industry’s number one market share solutions in four of the ten largest product segments of the EDA industry.

Prior to joining Mentor Graphics, Rhines was Executive Vice President of Texas Instruments’ Semiconductor Group, sharing responsibility for TI’s Components Sector, and having direct responsibility for the entire semiconductor business with more than $5 billion of revenue and over 30,000 people.

During his 21 years at TI, Rhines managed TI’s thrust into digital signal processing and supervised that business from inception with the TMS 320 family of DSP’s through growth to become the cornerstone of TI’s semiconductor technology. He also supervised the development of the first TI speech synthesis devices (used in “Speak & Spell”) and is co-inventor of the GaN blue-violet light emitting diode (now important for DVD players and low energy lighting). He was President of TI’s Data Systems Group and held numerous other semiconductor executive management positions.

Rhines has served five terms as Chairman of the Electronic Design Automation Consortium and is currently serving as vice-chairman. He is also a board member of the Semiconductor Research Corporation and First Growth Family & Children Charities. He has previously served as chairman of the Semiconductor Technical Advisory Committee of the Department of Commerce, as an executive committee member of the board of directors of the Corporation for Open Systems and as a board member of the Computer and Business Equipment Manufacturers’ Association (CBEMA), SEMI-Sematech/SISA, Electronic Design Automation Consortium (EDAC), University of Michigan National Advisory Council, Lewis and Clark College and SEMATECH.

Dr. Rhines holds a Bachelor of Science degree in metallurgical engineering from the University of Michigan, a Master of Science and Ph.D. in materials science and engineering from Stanford University, a master of business administration from Southern Methodist University and an Honorary Doctor of Technology degree from Nottingham Trent University.

 

Transforming Science Fiction into RealityKoneru_Cypress_Keynote
Surya N Koneru | Sr. Design Engineering Director | Cypress Semiconductor Technology
Smart technology has been revolutionizing human life endlessly. However, this is just the beginning. Technologies that are still nascent will soon become an integral part of our day-to-day lives. Technology is allowing human interactions with gadgets to become more natural – using voice, touch, gestures. These natural user interfaces pose a challenge to the semiconductor industry to build quick solutions that are programmable and require minimal changes to system hardware while adding features. Cypress’ PSoC (Programmable Systems on Chip) is the world’s only programmable embedded system-on-chip integrating high-performance analog, PLD-based programmable logic, memory, and a microcontroller – all on a single chip. This enables an engineer to integrate complex digital and analog processing into a single programmable chip, thereby, reducing number of board components and the cost of manufacturing.

Biography
Mr. Surya Koneru serves as Sr. Design Director at Cypress Semiconductor Technology, India. Mr. Koneru served as Analog Design Director at Cypress. Mr. Koneru has over 21 years of silicon development experience. Prior to joining Cypress, Mr. Koneru has served as Sr. Engineering Manager at Montalvo Systems and Intel where he was responsible for managing the development of CPU & Chip set circuit designs. Mr. Koneru received his masters in Electrical Engineering from Arizona State University, Tempe and an undergraduate degree in Electronics & Communications Engineering from Nagarjuna University.